Two incorrect bit definitions in the General Timer/Counter Control Register
According to the Atmel datasheet (document 4317, section 13.4), ICPSEL1 is bit
6, and TSM is bit 7.
According to io90pwm3b.h, lines 261 & 262, those bits are 2 and 3
I have confirmed that ICPSEL1 needs to be 6 by testing on actual hardware.
The incorrect definitions are present in version 2.0 and have been present
since the file was added. Odd that it hasn't been noticed before, although it
does require special circumstances: user must be doing captures with timer 1,
and must be using capture input B, pin PB6. (The default is to use input A,